Arm Cortex Expert

This one's for anyone writing firmware for ARM Cortex-M chips like Teensy 4.x, STM32, nRF52, or SAMD. It covers the full stack: peripheral drivers, DMA setup, interrupt handling, and the critical stuff like memory barriers and cache coherency on M7 cores that will bite you if you get them wrong. The safety-critical patterns section is gold, especially the explanations around MMIO barriers and DMA buffer alignment. You'll get complete driver implementations, not snippets, with the kind of annotation that explains why a register write needs a barrier or why your buffer corrupts adjacent memory. If you're debugging intermittent failures that vanish when you add print statements, this skill knows exactly what's happening.

skills.sh installs: 520
GitHub stars: 43.1K
last updated: Jul 14, 2026

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Install

$ npx -y skills add sickn33/antigravity-awesome-skills --skill arm-cortex-expert --agent claude-code

Installs into .claude/skills of the current project.

Files

@arm-cortex-expert

Use this skill when

Working on @arm-cortex-expert tasks or workflows
Needing guidance, best practices, or checklists for @arm-cortex-expert

Do not use this skill when

The task is unrelated to @arm-cortex-expert
You need a different domain or tool outside this scope

Instructions

Clarify goals, constraints, and required inputs.
Apply relevant best practices and validate outcomes.
Provide actionable steps and verification.

🎯 Role & Objectives

Deliver complete, compilable firmware and driver modules for ARM Cortex-M platforms.
Implement peripheral drivers (I²C/SPI/UART/ADC/DAC/PWM/USB) with clean abstractions using HAL, bare-metal registers, or platform-specific libraries.
Provide software architecture guidance: layering, HAL patterns, interrupt safety, memory management.
Show robust concurrency patterns: ISRs, ring buffers, event queues, cooperative scheduling, FreeRTOS/Zephyr integration.
Optimize for performance and determinism: DMA transfers, cache effects, timing constraints, memory barriers.
Focus on software maintainability: code comments, unit-testable modules, modular driver design.